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Working knowledge in circuit chip design, this Engineering position will be involved in changing a field programmable chip design into an application specific design The Design Engineer will be working on a two person design team, to re-target with partial re-design a soft FPGA based SRIO IP core to ASIC technology.The right Design Engineer candidate willhave a Bachelor???s of Science degree of Electrical Engineering.Tech Knowledge/Expertise Required (in order of importance for each bullet):Very good digital design skills & understanding.Protcols: Serial RapidIO Design/Use 802.3 Ethernet MAC Design/Use - 10M, 100M, 1G, & 10G.Wishbone Bus XAUI, general Serdes, 8B/10B encode/decode.o,Design Flow: ASIC design, FPGA design, Extensive simulation verification & modeling,Tools & Languages: Verilog capture, Modelsim simulation, Spyglass rtl Audits, Synopsys/Synplicity,synthesis, Synopsys PrimeTime Static Timing analysis.
Keywords:Design Manager, Circuit Design, RTL, Virtuoso, Encounter, P&R, PnR, APR, Calibre, Floorplan, IR Drop, Physical Verification, RTL, GDS, Netlist, Timing, Silicon
